Zentel A3F8GH40BBF-KD 8Gb DDR4 SDRAM
Zentel A3F8GH40BBF-KD 8Gb DDR4 SDRAM with Pseudo Open Drain (POD) interface for data input/output includes differential clock inputs operation (CK_t and CK_c). This SDRAM includes a Data Bus Inversion (DBI) to improve the power consumption and signal integrity of the memory interface. The A3F8GH40BBF-KD 8Gb DDR4 SDRAM supports Low Power Auto Self Refresh (LPASR), fine granularity refresh, write leveling, self-refresh abort, and Temperature Controlled Refresh (TCR). This SDRAM features eight internal banks, a Data Mask (DM) to write data, and maximum power-down mode for low power consumption with no internal refresh activity. The A3F8GH40BBF-KD 8Gb DDR4 SDRAM is JEDEC JESD-79-4 compliant and is available in a 96-ball FBGA package.
Features
- Data rate:
- 3200Mbps (DDR4-3200)
- 2933Mbps (DDR4-2933)
- 2666Mbps (DDR4-2666)
- 2400Mbps (DDR4-2400)
- 2133Mbps (DDR4-2133)
- 1866Mbps (DDR4-1866)
- 1600Mbps (DDR4-1600)
- 8 internal banks
- Supports Low Power Auto Self Refresh (LPASR)
- Refresh cycles:
- Average refresh period:
- 7.8μs at 0°C≤TC≤85°C
- 3.9μs at 85°C≤TC≤95°C
- Average refresh period:
- Pseudo Open Drain (POD) interface for data input/output
- Nominal, park, and dynamic On-Die Termination (ODT)
- DLL aligns DQ and DQS transitions with CK transitions
- Commands entered on each positive CK edge
- Supports fine granularity refresh
- Drive strength selected by MRS
- Data Mask (DM) for write data
- DLL aligns DQ and DQS transitions with CK transitions
- Supports hPPR and sPPR
- Connectivity test (x16 only)
- Power supply:
- VDD=VDDQ=1.2V±5%
- VPP=2.5V-5%+10%
- JEDEC JESD-79-4 compliant
- High-speed data transfer by the 8-bit pre-fetch
- Supports self-abort
- Supports programmable preamble and self-refresh
- Package:
- 96-ball FBGA
- Lead-free
Package Drawing
公開: 2024-06-18
| 更新済み: 2024-07-22