Zipcores Floating-point Mathematics IP Cores
Zipcores Floating-point Mathematics IP Cores are provided as native VHDL source code and are compatible with a wide range of FPGA, SoC, and ASIC technologies. ZipCores Floating-point IPs are compatible with standard IEEE 754 arithmetic. The Floating-point portfolio includes cores for all common floating-point operations, including multiply, divide, add/subtract, square-root, and conversion between floating-point formats. All the IPs are fully pipelined with very low latency. Floating-point Mathematics IP Cores are ideal for high-speed, high-throughput mathematical operations.
Features
- Provided as generic, human-readable, VHDL source-code
- Technology independent with complete portability between platforms
- Suitable for any FPGA, any SoC, or any custom ASIC solution
- Valid for Xilinx Vivado®, Intel® Quartus®, or Lattice Diamond® design software
- Simple IP licensing with a one-time fee and unlimited use
- Technical support and maintenance included for one year after purchase
- Fully custom design service provided
Applications
- Floating-point pipelines and arithmetic units
- Floating-point processors
- Interfacing between float/fixed number systems
Additional Resource
View Results ( 6 ) Page
| 部品番号 | データシート | 製品 | シリーズ |
|---|---|---|---|
| SKU12 |  |
IP Core - Floating-point Multiplier | Rev. 1.3 |
| SKU13 | |
IP Core - Floating-point Adder | Rev. 1.4 |
| SKU14 | |
IP Core - Floating-point to Fixed-point | Rev. 1.1 |
| SKU15 | |
IP Core - Fixed-point to Floating-point | Rev. 1.1 |
| SKU72 | |
IP Core - Floating-point Divider | Rev. 1.2 |
| SKU73 | |
IP Core - Floating-point Square-root | Rev. 1.2 |
公開: 2019-12-19
| 更新済み: 2023-08-23